LS3A6000 Specification
Frequency
2.0–2.5GHz
Peak computing speed
240 GFLOPS
Physical cores
4
Logical cores
8
Processor core
64-bit superscalar LA664 cores; supporting LoongArch instruction set architecture; supporting 128/256-bit vector instructions; 6-issue out-of-order execution; 4 fixed-point units, 4 vector units, and 4 memory access units
High-speed cache
Each processor core contains a 64KB private L1 instruction cache and a 64KB private L1 data cache. Each processor core contains a 256KB private L2 cache. All processor cores share a 16MB L3 cache
Memory controller
Two 72-bit DDR4-3200 controllers; supporting ECC
High-speed I/O
1 HyperTransport 3.0 controller
Other I/O
1 SPI, 1 UART, 2 I2Cs, and 16 GPIO interfaces
Packaging
35mm×35mm BGA package with 1,190 pins
Power management
Supporting dynamic shutdown of the clocks of main modules; supporting dynamic frequency scaling in main clock domains; supporting dynamic voltage scaling in main voltage domains
Typical power consumption
38W@2.5GHz